The Role of Y Chart and Gajski Kuhn Chart in Understanding VLSI Design Flow.

March 28, 2023

Very large scale integration (VLSI) is the process of creating an integrated circuit (IC) by combining thousands of transistors into a single chip.
While designing a VLSI circuit we follow a certain Design Flow which will start from design specifications and end at fabrication and Packaging.
The below diagram shows the Design Flow in VLSI.

To know more about the design flow, visit my blog The Journey of a Chip: Understanding the Complete Design Flow in VLSI.
The complete VLSI design flow can be divided into 3 domains:

Y Chart or Gajski-Kuhn Chart is simply a pictorial representation of these three Domains in VLSI for better understanding the complete Design Flow.
Below Diagram shows Y-Chart or Gajski-Kuhn Chart.

When we start designing the VLSI circuit we have certain specifications and based on which we formulate certain Algorithms within the Behavioural Domain.
These algorithms are then transmitted to the Structural Domain, where system assignments are made.
Based on the assigned system, a chip floor plan is made within the Physical Domain, using various floorplanning algorithms.
In the Finite state machine, we will check the functionality of the chip floor plan with respect to the time. Timing assignment will be done w.r.t registers in Structural Domain.
Subsequently, module placement occurs in the physical domain, aligning with timing assignments derived from the register.
Module Description in Behavioral Domain will define how Logic Gates will work.
Considering different current driven capabilities of different logic gates we place different logic blocks in cell placement of physical domain.
Then we will define the Boolean Equation of logic blocks and implement it using transistors.
Upon the completion of circuit verification, we will perform masking where we will provide physical links between logic blocks.

The Circuit Board - Your Ultimate Guide to Electronics and VLSI Design