Showing posts with label arithmetic logic unit. Show all posts
Showing posts with label arithmetic logic unit. Show all posts

April 30, 2026

Verilog Code for 4-bit ALU (With Explanation & Testbench) | #19

Welcome to another edition of our Verilog series! In this blog post, we’ll explore the implementation of an Arithmetic Logic Unit (ALU) in Verilog. An ALU is a fundamental component of digital systems that performs arithmetic and logical operations on binary data.

It is widely used in processors, microcontrollers, and digital signal processing systems.

Below is the Verilog code for a simple 4-bit ALU, implemented using a Behavioral Modeling approach:

In the behavioral modeling approach, we use a case statement to select different operations based on a control signal.

module alu(
  input [3:0] A, B,
  input [2:0] sel,
  output reg [3:0] result,
  output reg carry
);

always @(*)
begin
  case(sel)
    3'b000: {carry, result} = A + B; // Addition
    3'b001: {carry, result} = A - B; // Subtraction
    3'b010: result = A & B;          // AND
    3'b011: result = A | B;          // OR
    3'b100: result = A ^ B;          // XOR
    3'b101: result = ~A;             // NOT
    3'b110: result = A << 1;         // Shift Left
    3'b111: result = A >> 1;         // Shift Right
    default: result = 4'b0000;
  endcase
end

endmodule

๐Ÿงช Testbench

module tb_top;
  reg [3:0] A, B;
  reg [2:0] sel;
  wire [3:0] result;
  wire carry;

  alu uut(A, B, sel, result, carry);

  initial begin
    $monitor("Time=%0t A=%b B=%b sel=%b result=%b carry=%b",
              $time, A, B, sel, result, carry);

    A = 4'b0101; B = 4'b0011;

    sel = 3'b000; #10; // Add
    sel = 3'b001; #10; // Sub
    sel = 3'b010; #10; // AND
    sel = 3'b011; #10; // OR
    sel = 3'b100; #10; // XOR
    sel = 3'b101; #10; // NOT
    sel = 3'b110; #10; // Shift Left
    sel = 3'b111; #10; // Shift Right

    #10 $finish;
  end
endmodule

Explanation:

  • The ALU performs different operations based on the control signal sel.
  • Arithmetic operations include addition and subtraction.
  • Logical operations include AND, OR, XOR, and NOT.
  • Shift operations move bits left or right.
  • The carry output is used for arithmetic operations.

Conclusion

This Verilog implementation of an ALU demonstrates how multiple operations can be integrated into a single module. It is a key building block in processors and digital systems.

What’s Next?

Try extending this ALU by adding more operations or increasing bit width. In the next post, we’ll explore more advanced digital designs and their Verilog implementations.

Happy Coding! ๐Ÿš€

September 6, 2024

Full Subtractor Explained: Truth Table, Circuit Diagram, Working & Applications

In digital electronics, subtraction is as essential as addition, particularly when dealing with multi-bit numbers. While the Half Subtractor covers basic single-bit subtraction, it falls short when borrow operations come into play. The Full Subtractor is designed to handle these situations, making it a crucial element in advanced digital systems. This blog post will explore the Full Subtractor, its components, operation, and significance.

What is a Full Subtractor?

A Full Subtractor is a combinational circuit that performs the subtraction of two binary bits while accounting for a borrow from a previous stage. Unlike the Half Subtractor, which handles subtraction without borrow consideration, the Full Subtractor manages both the difference and borrow efficiently in multi-bit binary subtraction. It produces two outputs:

  • Difference (D)
  • Borrow (B_out)

Theoretical Background

Let’s revisit the rules of binary subtraction, adding the case where we borrow from a previous operation:

  • 0–0 = 0
  • 1–0 = 1
  • 1–1 = 0
  • 0–1 = 1 (with a borrow of 1)

When performing multi-bit subtraction, the Full Subtractor must also consider an input borrow (B_in) from the previous less significant bit, leading to more complex calculations.

Components of a Full Subtractor

A Full Subtractor involves three binary inputs:

  • A: The minuend (the number being subtracted from)
  • B: The subtrahend (the number being subtracted)
  • B_in: The borrow input from the previous stage

The Full Subtractor employs the following logic gates:

  • XOR Gates: To compute the difference
  • AND and OR Gates: To compute the borrow output

The logic expressions for the outputs are:

  • Difference (D) = A ⊕ B ⊕ B_in
  • Borrow out (B_out) = (A’ ANDB) OR ((A ⊕ B)’ AND B_in)

Circuit Diagram

The Full Subtractor circuit is built using the above components, showing how the XOR gates compute the difference and how the AND/OR gates handle the borrow. Here’s a simplified diagram for better understanding:

Truth Table

The Full Subtractor truth table details the results of all possible combinations of the three inputs (A, B, and B_in):

Applications of Full Subtractor

The Full Subtractor is vital in systems requiring multi-bit subtraction, including:

  • Arithmetic Logic Units (ALUs): A core component in CPUs for handling multi-bit arithmetic operations.
  • Digital Counters: Used in applications that require down-counting, where the Full Subtractor helps manage borrow operations.
  • Binary Calculators: Necessary for performing precise binary arithmetic.
  • Data Processing Systems: In systems requiring complex binary operations, the Full Subtractor plays a key role in ensuring accurate computations.

Conclusion

The Full Subtractor extends the functionality of the Half Subtractor by accounting for borrow operations, making it indispensable in multi-bit subtraction scenarios. Understanding the Full Subtractor’s logic and applications is essential for advancing in digital circuit design and gaining a deeper insight into how subtraction is handled in various digital systems. As you move toward more complex circuits, mastering the Full Subtractor will provide a strong foundation for future exploration in digital electronics.

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