Full Form: Metal Oxide Semiconductor Field Effect Transistor.
- It is a 4 terminal device: Gate, Source, Drain, and Substrate.
- Based on channel MOSFET can be divided into 2 types:
1] Enhancement Type MOSFET
2] Depletion Type MOSFET
![](https://miro.medium.com/max/700/1*sOQh76myXE3IIj6YO3sWjQ.jpeg)
- These types can be further divided as, n channel and p channel MOSFET:
![](https://miro.medium.com/max/700/1*rKIUkzH44CSK_YbMV3CeHQ.jpeg)
- Structure of Enhancement type MOSFET:
![](https://miro.medium.com/max/544/1*oeh0HTf-Dw7pmJH57k6ugA.jpeg)
The above diagram shows an n channel Enhancement type MOSFET where the channel is made of n-type material, the substrate is made of p-type material and a SiO2 layer is mounted on it. To form the source and drain terminal we diffuse n+ type material on the p-type substrate. The region between source and drain is called a channel. Through metallic contacts, the drain and source terminals are connected to this n-type channel. Here, the gate terminal is also connected through metallic contact but is isolated from the channel using insulating material (SiO2). Due to this insulating material, no current will flow through the gate terminal and hence the gate terminal will have very high input impedance. It is called an Enhancement type MOSFET because by applying control voltage between Gate and Source, the channel is formed between Drain and Source hence, enhancing the number of charge carriers in the channel region.
- Working:
Case-1: Consider, that the gate and source terminal is connected to the ground i.e., Vgs=0V, and a positive voltage is applied between drain and source. As there is no channel present there will be no flow of current between source and drain. Therefore, when Vgs is zero, MOSFET will be in OFF condition, or it will be in the cut-off region.
![](https://miro.medium.com/max/442/1*4sv_M8bpKnuVuLGzPa8skg.jpeg)
Case-2: Now, we apply a voltage between gate and source and keep the voltage between drain and source (Vds) as 0V. Here, holes are the majority charge carriers in the p-type substrate, and hence when we apply positive voltage at the gate terminal holes near the oxide layer will get pushed away from the gate terminal, and electrons which are minority charge carriers from the p-type substrate will get attracted towards the oxide layer. But at a lower value of Vgs voltage, these electrons will get combined with these holes.
![](https://miro.medium.com/max/700/1*pUnPHVN92wexk80HtfW2JA.jpeg)
As we increase the gate voltage more holes will be pushed away from the gate terminal and electrons will overcome the recombination with these holes and get attracted towards the gate terminal and get accumulated at the insulating oxide layer and will form an inversion layer of free electrons near the oxide layer. This inversion layer will act as a channel with a drain and source region. Now, if we apply a voltage between drain and source (Vds) current will flow through this channel. The value of Vgs voltage at which the inversion layer is formed is called Threshold Voltage (Vth). Below this threshold voltage, there will be no flow of current through the channel. As we increase the Vgs voltage above Vth the channel width will go on increasing.
Along with the channel, there will also be a depletion layer between the n-type drain and source and p-type substrate region. These 2 PN junctions are reverse biased. Now, consider that Vgs>Vth and a positive voltage is applied between drain and source. Here, electrons will get attracted towards the positive terminal and current will flow through the circuit. The conventional current will flow from drain to source.
![](https://miro.medium.com/max/700/1*TJjRiqiGRMIXyrIrUcStfg.jpeg)
But as you can observe in the above figure that the width of the channel will get reduced at the drain terminal because due to positive voltage at the drain side the PN junction at the drain will get more reverse biased and the width of the depletion region will increase. Due to this, the effective channel width will decrease towards the drain terminal. As we increase this Vds voltage further Pinch OFF condition will occur where drain current will get saturated. So, the Vds voltage at which the Pinch OFF condition occurs is called Saturation voltage. This saturation voltage can be expressed as
Vds(sat) = Vgs-Vth
Case-3: If the keep Vgs constant and further increase Vds above Vds(sat) no channel will be formed at the Drain terminal. Here, it can be observed that no current flows through the channel but still electrons will pass towards the drain from the source due to electric force. So once the pinch-off condition occurs current Id gets saturated and if we increase Vds further current Id will remain constant.
![](https://miro.medium.com/max/700/1*t06kvaxIFAUAZOz4WEBtVg.jpeg)
- The below graph shows the Drain characteristics of Enhancement type MOSFET:
![](https://miro.medium.com/max/700/1*T1Xp4h7o64Ol5Fd9zLt8Fw.jpeg)
For different values of Vgs, the graph of Id vs Vds will be as follows:
- As the value of Vgs increases the value of Id also increases.
- The parabolic curve shows the locus of Vds when the drain current Id will get saturated.
- The graph can be divided into 3 sections:
1] Linear or ohmic region: In this region, MOSFET can be operated as voltage controlled resistor. With the fixed value of Vds if we change the value of Vgs the width of the channel will change, or channel resistance will change. MOSFET will operate in this region when
Vds<Vgs-Vth,
Vgs>Vth
2] Cut-off region: When Vgs<Vth MOSFET will operate in this region. Here, no current will flow through the MOSFET, and MOSFET will be in an OFF state.
3] Saturation Region: When Vds≥Vgs-Vth then MOSFET will operate in the saturation region.
- The below graph shows the Transfer characteristics of Enhancement type MOSFET.
![](https://miro.medium.com/max/700/1*QvwWx8WBKrOhH5gJZ8baMg.jpeg)
This graph shows the relation between input voltage Vgs and output drain current Id with a constant value of Vds.
- Here, we can see that till Vgs voltage is not equal to Vth, Id current will be zero and after Vgs=Vth as we increase Vgs voltage the Id current will also increase. The relation between Vgs and Id can be given as
Id=K(Vgs-Vth)2
Here, the value of k depends on the physical parameters of the device.
In this way, the MOSFET will function with respect to changes in different voltages.
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